Method for fabricating a flip chip package with pillar bump...

Details Method for fabricating a flip chip package with pillar bump... Method for fabricating a flip chip package with pillar bump...

2006-08-08

2006-08-08

Schillinger, Laura (Department: 2813)

Semiconductor device manufacturing: process

Packaging or treatment of packaged semiconductor

Assembly of plural semiconductive substrates each possessing...

C438S107000, C438S118000

Reexamination Certificate

active

07087458

ABSTRACT:
A method for joining a semiconductor integrated circuit (IC) chip in a flip chip configuration, via pillar bump, to solderable metal contact pads, leads or circuit lines on the ciruitized surface of a chip carrier, as well as the resulting chip package, are disclosed. The semiconductor device is attached to the substrate via no flow underfill under thermal compression bonding. Integration of this structure and assembly method enables to incorporate low coefficient of thermal expansion (CTE) no flow underfill and achieve high assembly yield, especially for lead free bumps. The present invention provides a solution for a flip chip package with fine pitch, high pin count and lead free requirements.

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