Active solid-state devices (e.g. – transistors – solid-state diode – Housing or package – Insulating material
Reexamination Certificate
2006-10-31
2006-10-31
Baumeister, B. William (Department: 2891)
Active solid-state devices (e.g., transistors, solid-state diode
Housing or package
Insulating material
C257SE23129
Reexamination Certificate
active
07129576
ABSTRACT:
A capped chip is provided which includes a chip and a cap member, the chip having a front surface and a plurality of bond pads exposed at the front surface, the cap member having a bottom surface facing the front surface of the chip and having a top surface opposite the front surface. A plurality of through holes extend from the bottom surface of the cap member to the top surface. The capped chip assembly further includes a plurality of metallic interconnects extending from the bond pads at least partially through the through holes, the metallic interconnects including stud bumps joined to the bond pads, the stud bumps contacting and engaging at least one of (i) the top surface of the cap member surrounding the through holes and (ii) inner surfaces of the through holes.
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U.S. Appl. No. 10/077,388, filed Feb. 15, 2002, assigned to Tessera, Inc.
Baumeister B. William
Farahani Dana
Lerner,David,Littenberg,Krumholz & Mentlik, LLP
Tessera Inc.
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