Current transfer logic

Miscellaneous active electrical nonlinear devices – circuits – and – Signal converting – shaping – or generating – Current driver

Reexamination Certificate

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Details

C326S083000, C326S086000

Reexamination Certificate

active

07154307

ABSTRACT:
A current mode transfer logic system suitable for driving transmission lines is disclosed. In one embodiment a twisted pair transmission line is terminated in its characteristic line impedance. A signal is formed of two unequal currents, preferably of different polarities as well as magnitudes, that are driven down the two lines. The unequal currents are selectively switched between the two lines creating a logic signal of a differential current drive of unequal current magnitudes. The unequal currents are received and shunted from the distal end of each line via diode connected MOS transistors. The MOS transistors are biased to present a low impedance, but an impedance higher than the terminating resistor. The currents are amplified and converted to useable CMOS voltage levels. In another embodiment the twisted pair is replaced by two parallel transmission lines which are terminated in one resistor, equal to the sum of the characteristic impedances of each line. The terminating resistor is connected between the distal signal carrying conductors of each transmission line. The shields or return paths for each line are tied together at the distal and at the proximate (drive) ends of the line.

REFERENCES:
patent: 5111080 (1992-05-01), Mizukami et al.
patent: 5519728 (1996-05-01), Kuo
patent: 5592510 (1997-01-01), Van Brunt et al.
patent: 5767699 (1998-06-01), Bosnyak et al.
patent: 5801564 (1998-09-01), Gasparik
patent: 5811984 (1998-09-01), Long et al.
patent: 5959472 (1999-09-01), Nagamatsu et al.
patent: 6025742 (2000-02-01), Chan
patent: 6236269 (2001-05-01), Hojabri
patent: 6252432 (2001-06-01), Freitas
patent: 6313662 (2001-11-01), Ide
patent: 6320417 (2001-11-01), Kirsch et al.
patent: 6448815 (2002-09-01), Talbot et al.
patent: 6476642 (2002-11-01), Morano
patent: 6590422 (2003-07-01), Dillon
patent: 2003/0107411 (2003-06-01), Martin et al.
patent: 1017196 (2000-07-01), None
patent: 07-307661 (1995-11-01), None
patent: WO 95/27353 (1995-10-01), None
Seevinck, Evert, Current-Mode Techniques for High-Speed VLSI Circuits with to Current Sense Amplifier for CMOS SRAM's, IEEE Journal of Solid-State Circuits, vol. 26, No. 4, Apr. 1991.
Sim, Jae-Yoon, A 1-Gb/s Bidirectional I/O Buffer Using the Current-Mode Scheme, IEEE Journal of Solid-State Circuits, vol. 34, No. 4, Apr. 1999.
Sim et al. “A 1-Gb/s Bidirectional I/O Buffer Using the Current-Mode Scheme” IEE Journal of Solid-State Circuits, New York, US, Apr. 1999.
International Search Report for International Application No. PCT/US/2004/037145, dated Jun. 29, 2005.

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