Method of evaluating characteristics of semiconductor memory...

Static information storage and retrieval – Floating gate – Particular connection

Reexamination Certificate

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C365S185060, C365S185140

Reexamination Certificate

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07088618

ABSTRACT:
A characteristic evaluating method of precisely obtaining a resistance value of an offset region in a semiconductor memory element constructed so that the resistance value of the offset region positioned below a memory function element formed on one side or both sides of a gate electrode changes according to an amount of charges or a polarization state of charges accumulated in said memory function element includes: a step of obtaining each of a resistance value between two diffusion regions inclusive formed on both sides of a channel region disposed just below the gate electrode of the semiconductor memory element via a gate insulating film, a resistance value of the channel region, and a resistance value of the diffusion regions; and a step of calculating the resistance value of the offset region which isolates the channel region and the diffusion region from each other on the basis of a result of subtracting the resistance value of the channel region and the resistance value of the diffusion regions from the resistance value between the two diffusion regions.

REFERENCES:
patent: 5303185 (1994-04-01), Hazani
patent: 5981996 (1999-11-01), Fujishima
patent: 5-81075 (1993-04-01), None
patent: 5-30427 (1993-05-01), None
patent: WO-03/044868 (2003-05-01), None

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