Semiconductor leadframes plated with thick nickel, minimum...

Semiconductor device manufacturing: process – Packaging or treatment of packaged semiconductor – Making plural separate devices

Reexamination Certificate

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C438S123000

Reexamination Certificate

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07064008

ABSTRACT:
A leadframe for use with integrated circuit chips comprising a base metal having a plated layer of nickel fully covering the base metal; a plated layer of pure tin on the nickel layer, selectively covering areas of the leadframe intended for attachment to other parts; and a plated layer of palladium on said nickel layer, selectively covering areas of said Leadframe intended for bonding wire attachment.

REFERENCES:
patent: 4707724 (1987-11-01), Suzuki et al.
patent: 5424578 (1995-06-01), Fujita et al.
patent: 5540378 (1996-07-01), Mahulikar et al.
patent: 5635755 (1997-06-01), Kinghorn
patent: 5882955 (1999-03-01), Huang et al.
patent: 6376901 (2002-04-01), Abbott
patent: 6545344 (2003-04-01), Abbott
patent: 6706561 (2004-03-01), Abbott
patent: 2002/0047186 (2002-04-01), Tellkamp et al.
patent: 2002/0070434 (2002-06-01), Abbott et al.
patent: 2002/0144396 (2002-10-01), Glenn
patent: 2002/0148630 (2002-10-01), Glenn
patent: 2004/0155321 (2004-08-01), Abbott
patent: 359161850 (1984-12-01), None
Suzuki et al. (English Language Abstract), Sep. 12, 1984, pp. 1-2.
Zarlink Semiconductor, Zarlink Pb-Free/RoHS Strategy, pp. 1-2.
“Semiconductor Leadframes Comprising Silver Plating” Tellkamp, U.S. Patent Publication No. US 2002/0047186 A1 Published Apr. 25, 2002, filed Jul. 17, 2001.

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