Static information storage and retrieval – Addressing – Particular decoder or driver circuit
Reexamination Certificate
2006-10-10
2006-10-10
Nguyen, VanThu (Department: 2824)
Static information storage and retrieval
Addressing
Particular decoder or driver circuit
Reexamination Certificate
active
07120082
ABSTRACT:
The present invention provides a system for reducing row periphery power consumption in a semiconductor memory device, particularly during sleep mode operation. A memory device (100) according to the present invention has a row (106) of memory cells and driver circuitry (102) preceding the row of memory cells. The present invention provides an intervention circuit (114) instantiated within the driver circuitry proximal to the row of memory cells. The intervention circuit is operated to hold the row of memory cells at a desired state, while the driver circuitry (108, 110) preceding the intervention circuit is powered down.
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patent: 6934210 (2005-08-01), Akiba et al.
Koji Nii, et al., “A 90 nm Low Power 32K-Byte Embedded SRAM with Gate Leakage Suppression Circuit for Mobile Applications” Symposium on VLSI Circuits, 2003.
Deng Xiaowei
Houston Theodore W.
Sheffield Bryan D.
Brady W. James
Keagy Rose Alyssa
Nguyen Van-Thu
Telecky , Jr. Frederick J.
Texas Instruments Incorporated
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