Method of forming through-the-wafer metal interconnect...

Semiconductor device manufacturing: process – Chemical etching – Vapor phase etching

Reexamination Certificate

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C438S745000

Reexamination Certificate

active

07005388

ABSTRACT:
A semiconductor die is formed in a process that forms a hole through the wafer prior to the formation of the contacts and the metal-1 layer of an interconnect structure. The through-the-wafer hole is formed by using a wafer with a <110> crystallographic orientation and a wet etch, such as with ethanol (KOH) or tetramethylammonium hydroxide (TMAH).

REFERENCES:
patent: 3928093 (1975-12-01), van Tangerloo et al.
patent: 3937579 (1976-02-01), Schmidt
patent: 4189820 (1980-02-01), Slack
patent: 4261781 (1981-04-01), Edmonds et al.
patent: 4782028 (1988-11-01), Farrier et al.
patent: 5142756 (1992-09-01), Ibaraki et al.
patent: 5166097 (1992-11-01), Tanielian
patent: 5240882 (1993-08-01), Satoh et al.
patent: 5250460 (1993-10-01), Yamagata et al.
patent: 5362683 (1994-11-01), Takenaka et al.
patent: 5426072 (1995-06-01), Finnila
patent: 5530552 (1996-06-01), Mermagen et al.
patent: 5608237 (1997-03-01), Aizawa et al.
patent: 5627106 (1997-05-01), Hsu
patent: 5674787 (1997-10-01), Zhao et al.
patent: 5702976 (1997-12-01), Schuegraf et al.
patent: 5739067 (1998-04-01), DeBusk et al.
patent: 5872053 (1999-02-01), Smith
patent: 5904529 (1999-05-01), Gardner et al.
patent: 6010951 (2000-01-01), Pushpala et al.
patent: 6015726 (2000-01-01), Yoshida
patent: 6027964 (2000-02-01), Gardner et al.
patent: 6110825 (2000-08-01), Mastromatteo et al.
patent: 6187677 (2001-02-01), Ahn
patent: 6221769 (2001-04-01), Dhong et al.
patent: 6249136 (2001-06-01), Maley
patent: 6252300 (2001-06-01), Hsuan et al.
patent: 6479341 (2002-11-01), Lu
patent: 6479382 (2002-11-01), Naem
patent: 6563189 (2003-05-01), Dark et al.
patent: 6815797 (2004-11-01), Dark et al.
patent: 64-19729 (1989-01-01), None
U.S. Appl. No. 10/728,132, filed Dec. 4, 2003, Peter J. Hopper et al.
U.S. Appl. No. 10/727,838, filed Dec. 4, 2003, Peter J. Hopper et al.
U. Simu et al., “Limits in Micro Replication of CVD Diamond By Moulding Technique”, 1997, [online], [retrieved on Nov. 16, 2003]. Retrieved from the Internet: <URL:http://www.angstrom.uu.se/solidstatephysics/joakim/limits.pdf>. pp. 1-11, (note p. 5, col. 2, lines 15-23).
E. Hui et al., “Carbonized Parylene as a Conformal Sacrificial Layer”, [online], [retrieved on Nov. 16, 2003]. Retrieved from the Internet: <URL:http://www.bsac.eecs.berkeley.edu/archive/users/hvi-elliot/pdf/sacpaper.pdf>. pp. 1-5 (unnumbered), (note p. 2, Process Characterization, first paragraph).
U.S. Appl. No. 10/004,977, filed Dec. 3, 2001, Yegnashankaran et al.
G. Stemme, “Fabrication of MEMS”, [online], [retrieved on Nov. 16, 2003], Retrieved from the Internet: <URL:http://mmadou.eng.vci.edu/PDF%20Files/Stemme%20Fabrication.pdf>. pp. 1-9 (unnumbered), (note p. 3.).

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