System and method for extraction of C-V characteristics of...

Electricity: measuring and testing – Fault detecting in electric circuits and of electric components – Of individual circuit component or element

Reexamination Certificate

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C324S1540PB

Reexamination Certificate

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07088123

ABSTRACT:
In one embodiment, a method for extracting C-V characteristics of ultra-thin oxides includes coupling a device under test to a testing structure, in which the device under test includes a plurality of transistors. Alternatively, the device under test includes a plurality of varactors. The method further includes inputting a radio frequency signal of at least one GHz into the testing structure, de-embedding the parasitics of the testing structure, inputting a bias into the device under test, determining the capacitance density per gate width of the device under test, plotting capacitance density per gate width versus gate length to obtain a first curve, and determining a slope of the first curve. These steps are repeated for one or more additional biasing conditions, and the determined slopes are plotted on a capacitance density per voltage graph to obtain a C-V curve for the device under test.

REFERENCES:
patent: 5266892 (1993-11-01), Kimura
patent: 5644223 (1997-07-01), Verkuil
Specification entitled “Integrating High Frequency Capacitance Measurement for Monitoring Process Variation of Equivalent Oxide Thickness of Ultra-Thin Gate Dielectrics”, by Yuegang Zhao; ™ 2004 Keithley Instruments, Inc. Cleveland, Ohio 44139 (16 pages).

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