Test system for bumped semiconductor components

Details Test system for bumped semiconductor components Test system for bumped semiconductor components

2006-02-21

2006-02-21

Nguyen, Vinh (Department: 2829)

Electricity: measuring and testing

Fault detecting in electric circuits and of electric components

Of individual circuit component or element

C324S765010

Reexamination Certificate

active

07002362

ABSTRACT:
An interconnect for testing semiconductor components includes a substrate, and contacts on the substrate for making temporary electrical connections with bumped contacts on the components. Each contact includes a recess and a pattern of leads cantilevered over the recess configured to electrically engage a bumped contact. The leads are adapted to move in a z-direction within the recess to accommodate variations in the height and planarity of the bumped contacts. In addition, the leads can include projections for penetrating the bumped contacts, a non-bonding outer layer for preventing bonding to the bumped contacts, and a curved shape which matches a topography of the bumped contacts. The leads can be formed by forming a patterned metal layer on the substrate, by attaching a polymer substrate with the leads thereon to the substrate, or be etching the substrate to form conductive beams.

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Information Displayed at Chip Con 1997-1998, 4 sheets, on FE CRD Floating Point Technology, (mouth unavailable).

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