Method and apparatus for generating a squared value for a...

Details Method and apparatus for generating a squared value for a... Method and apparatus for generating a squared value for a...

2006-02-21

2006-02-21

Malzahn, D. H. (Department: 2193)

Electrical computers: arithmetic processing and calculating

Electrical digital calculating computer

Particular function performed

Reexamination Certificate

active

07003544

ABSTRACT:
A squaring circuit for signed binary numbers includes a signed binary number modification unit that generates a modified signed binary number. The squaring circuit includes a partial product generation unit that generates partial products that make up a squared value of the modified signed binary number. The squaring circuit includes a correction value generation unit that generates a correction value for the signed binary number. The squaring circuit includes a summing unit that sums the partial products with the correction value to generate a squared value for the signed binary number.

REFERENCES:
patent: 4313174 (1982-01-01), White
patent: 5629885 (1997-05-01), Pirson et al.
patent: 5957999 (1999-09-01), Davis
patent: 6567832 (2003-05-01), Ono et al.
patent: 6775685 (2004-08-01), Wood

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