Semiconductor device manufacturing: process – Chemical etching – Combined with the removal of material by nonchemical means
Reexamination Certificate
2006-12-12
2006-12-12
Norton, Nadine G. (Department: 1765)
Semiconductor device manufacturing: process
Chemical etching
Combined with the removal of material by nonchemical means
C438S250000, C438S253000, C438S381000, C438S396000
Reexamination Certificate
active
07148146
ABSTRACT:
A system, apparatus and/or method is provided for fabricating an integrated capacitor during the fabrication of a transistor employing chemical mechanical polishing of a gate electrode of the transistor. Components of the integrated capacitor, particularly the lower electrode of a parallel plate capacitor in one form thereof, and an outer plate of a cylindrical-like capacitor in another form thereof, are defined by the polish stop layer during chemical mechanical polishing (CMP) of a gate of the transistor. According to an aspect of the subject invention, the polish stop layer may be an oxide or a nitride.
REFERENCES:
patent: 6699766 (2004-03-01), Taravade et al.
Johnson Gregory A.
Taravade Kunal N.
George Patricia
LSI Logic Corporation
Maginot Moore & Beck LLP
Norton Nadine G.
LandOfFree
Method of fabricating an integral capacitor and gate... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Method of fabricating an integral capacitor and gate..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method of fabricating an integral capacitor and gate... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3658569