Non-volatile semiconductor memory with large erase blocks...

Details Non-volatile semiconductor memory with large erase blocks... Non-volatile semiconductor memory with large erase blocks...

2006-08-01

2006-08-01

Zarabian, Amir (Department: 2827)

Static information storage and retrieval

Floating gate

Particular connection

C365S185020, C365S185090, C365S185190, C365S185240, C365S185280, C365S185290, C365S230030, C365S233100, C365S238500

Reexamination Certificate

active

07085161

ABSTRACT:
In a flash EEPROM system that is divided into separately erasable blocks of memory cells with multiple pages of user data being stored in each block, a count of the number of erase cycles that each block has endured is stored in one location within the block, such as in spare cells of only one page or distributed among header regions of multiple pages. The page or pages containing the block cycle count are initially read from each block that is being erased, the cycle count temporarily stored, the block erased and an updated cycle count is then written back into the block location. User data is then programmed into individual pages of the block as necessary. The user data is preferably stored in more than two states per memory cell storage element, in which case the cycle count can be stored in binary in a manner to speed up the erase process and reduce disturbing effects on the erased state that writing the updated cycle count can cause. An error correction code calculated from the cycle count may be stored with it, thereby allowing validation of the stored cycle count.

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