Dynamic register with IDDQ testing capability

Details Dynamic register with IDDQ testing capability Dynamic register with IDDQ testing capability

2006-10-31

2006-10-31

Tang, Minh N. (Department: 2829)

Electricity: measuring and testing

Measuring, testing, or sensing electricity, per se

With rotor

C324S765010, C324S762010

Reexamination Certificate

active

07129697

ABSTRACT:
The present invention is a method and a system for controlling a voltage at a node in a circuit such that the node is prevented from having an unknown floating voltage during a steady state of a clock signal. The circuit includes a transmission gate which has input and output terminals, and operates in response to a clock signal. The node is located proximal to the output terminal of the transmission gate. The method includes the operations of driving the node with an input signal when the transmission gate is open during a first steady state of the clock signal and pulling the node to a fixed voltage when the transmission gate is closed during a second steady state of the clock signal

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