Semiconductor arrangement

Static information storage and retrieval – Interconnection arrangements

Reexamination Certificate

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C365S149000, C365S150000

Reexamination Certificate

active

07136295

ABSTRACT:
A semiconductor arrangement on a semiconductor chip includes a number of lines of a first type that extend outwardly from an inner region toward an outer region of the semiconductor chip. A number of lines of a second type are arranged around the inner region of the semiconductor chip. The lines of the second type are bit lines when the lines of the first type are word lines and the lines of the second type are word lines when the lines of the first type are bit lines. A number of individual element arrays are arranged along the lines of the first type and lines of the second type. The individual element arrays include memory cells.

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Kalter, H.L., et al., “An Experimental 80-ns 1-Mbit DRAM with Fast Page Operation,” IEEE Journal of Solid-State Circuits, vol. Sc-20, No. 5, Oct. 1985, pp. 914-923.

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