Distributed pipeline scheduling method and system

Multiplex communications – Pathfinding or routing – Switching a message which includes an address header

Reexamination Certificate

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C370S412000

Reexamination Certificate

active

07142546

ABSTRACT:
In a distributed pipeline scheduling method for a system which includes a plurality of input ports for inputting data, a plurality of output ports for outputting data, a data switch element for switching the data input from the input ports and transferring the data to the output ports, and a scheduler having a distributed scheduling architecture for controlling the data switch element, and determines connection reservations between the input ports and the output ports, the scheduler independently assigns time slots to information transfer processing and reservation processing. Processing information transfer processing and reservation processing are performed in the assigned time slots in a pipeline fashion. A distributed pipeline scheduling system and distributed scheduler are also disclosed.

REFERENCES:
patent: 5724351 (1998-03-01), Chao et al.
patent: 5805849 (1998-09-01), Jordan et al.
patent: 6122274 (2000-09-01), Kumar
patent: 6269439 (2001-07-01), Hanaki
patent: 1 009 189 (2000-06-01), None
A. Smiljanić et al., “RRGS-Round-Robin Greedy Scheduling for Electronic/Optical Terabit Switches”, Globecom 99, Nov. 1999, 7 pages.

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