Static information storage and retrieval – Floating gate – Particular connection
Reexamination Certificate
2006-08-22
2006-08-22
Zarabian, Amir (Department: 2827)
Static information storage and retrieval
Floating gate
Particular connection
C365S072000, C365S185260, C365S185280, C365S185290
Reexamination Certificate
active
07095651
ABSTRACT:
A memory cell has a selection transistor constituted of an MOS transistor having a gate electrode and a cell transistor constituted of an MOS transistor having the same polarity as the selection transistor, in such a configuration that these two transistors are connected in series. A bit line is connected to a drain region of the selection transistor and a word line is connected to the gate electrode thereof. A gate electrode of the cell transistor is not electrically connected anywhere so as to be in a floating potential state, while a drain region thereof is connected to a source region of the selection transistor. A source line is connected to a source region of the cell transistor.
REFERENCES:
patent: 5204835 (1993-04-01), Eltan
patent: 5798965 (1998-08-01), Jun
patent: 5877524 (1999-03-01), Oonakado et al.
patent: 6014328 (2000-01-01), Onakado et al.
patent: 6275413 (2001-08-01), Naura
patent: 6433382 (2002-08-01), Orlowski et al.
patent: 6456534 (2002-09-01), Jinbo
patent: 6568510 (2003-05-01), Cavaleri et al.
patent: 6731540 (2004-05-01), Lee et al.
patent: 6757196 (2004-06-01), Tsao et al.
patent: 6822286 (2004-11-01), Hsu et al.
patent: 6856544 (2005-02-01), Nakamura
patent: 2001/0005015 (2001-06-01), Futatsuyama et al.
patent: 2003/0039146 (2003-02-01), Choi
patent: 2004/0213046 (2004-10-01), Yoshida
S. Shukuri, et al., IEEE 2001 Custom Integrated Circuits Conference, pp. 179-182, “CMOS Process Compatible ie-Flash(Inverse Gate Electrode Flash) Technology for System-on-a-Chip”, 2001.
A. Bergemont, et al., Non-Volitile Semiconductor Memory Workshop 2000, pp. 86-89, “A Non-Violatile Memory Device With True CMOS Capatability”, 2000.
Shirota Riichiro
Sugimae Kikuko
Kabushiki Kaisha Toshiba
Oblon & Spivak, McClelland, Maier & Neustadt P.C.
Pham Ly Duy
Zarabian Amir
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