Static information storage and retrieval – Floating gate – Particular biasing
Reexamination Certificate
2006-02-21
2006-02-21
Hoang, Huan (Department: 2827)
Static information storage and retrieval
Floating gate
Particular biasing
C365S185180, C365S072000, C711S103000
Reexamination Certificate
active
07002849
ABSTRACT:
A method for programming and erasing a non-volatile memory with a nitride tunneling layer is described. The non-volatile memory is programmed by applying a first voltage to the gate and grounding the substrate to turn on a channel between the source and the drain, and applying a second voltage to the drain and grounding the source to induce a current in the channel and thereby to generate hot electrons therein. The hot electrons are injected into a charge-trapping layer of the non-volatile and trapped therein through the nitride tunneling layer. The non-volatile memory is erased by applying a first positive bias to the drain, applying a second positive bias to the gate, and grounding the source and the substrate to generate hot electron holes in the channel region. The hot electron holes are injected into the charge-trapping layer through the nitride tunneling layer.
REFERENCES:
patent: 5500816 (1996-03-01), Kobayashi
patent: 6172907 (2001-01-01), Jenne
patent: 6566680 (2003-05-01), Krivokapic
patent: 6724661 (2004-04-01), Lee et al.
Chan Kwang-Yang
Fan Tso-Hung
Liu Mu-Yi
Lu Tao-Cheng
Yeh Yen-Hung
Hoang Huan
J.C. Patents
MACRONIX International Co. Ltd.
Pham Ly Duy
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