EEPROM memory comprising a non-volatile register integrated...

Details EEPROM memory comprising a non-volatile register integrated... EEPROM memory comprising a non-volatile register integrated...

2006-11-21

2006-11-21

Phung, Anh (Department: 2824)

Static information storage and retrieval

Floating gate

Particular connection

C365S185230, C365S218000

Reexamination Certificate

active

07139195

ABSTRACT:
An electrically erasable and programmable memory includes a memory array and a non-volatile register integrated with the memory array. The memory array includes normal memory cells arranged in rows and columns. Normal bit lines are coupled to the columns of the normal memory cells, and word lines are coupled to the rows of the normal memory cells. The non-volatile register includes at least one memory point. Each memory point includes at least one normal memory cell coupled to one of the normal bit lines. Each normal memory cell includes a floating-gate transistor having a floating gate and a tunnel window associated with the floating gate. A selection transistor is coupled to the floating-gate transistor. Each memory point further includes at least one special memory cell including a floating-gate transistor having a floating gate coupled to the floating gate of the normal memory cell. The special memory cell is devoid of a tunnel window. A special bit line is coupled to the special memory cell so that the memory point can be read.

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