Modeling overlapping of memory references in a queueing...

Data processing: database and file management or data structures – Database design – Data structure types

Reexamination Certificate

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C711S118000

Reexamination Certificate

active

07054874

ABSTRACT:
One embodiment of the present invention provides a system that facilitates modeling the effects of overlapping of memory references in a queueing system model. The system receives a memory reference during execution of a queueing system model. Upon receiving the memory reference, the system determines if the memory reference generates a cache miss. If so, the system models the cache miss in a manner that accounts for possible overlapping of the cache miss with other memory references and other processor operations.

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Prieto et al., “DataLocality Exploitation in the Decoposition of Regular Domain Problems”, Nov. 2000, IEEE Transaction on parallel and distributed systems, vol. 11, No. 11, pp. 1141-1150.
Publication entitled “Analytical Analysis of Finite Cache Penalty and Cycles Per Instruction of a Multiprocessor Memory Hierarchy Using Miss Rates and Queuing Theory,” by R.E. Matick et al., IBM J. Res. & Dev., vol. 45, No. 6, Nov. 2001, pp. 819-842.

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