Dynamic selection of a compression algorithm for trace data

Data processing: software development – installation – and managem – Software program development tool – Testing or debugging

Reexamination Certificate

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C717S124000, C717S129000

Reexamination Certificate

active

07069544

ABSTRACT:
A system and method for program counter and data tracing is disclosed. The tracing mechanism of the present invention enables increased visibility into the hardware and software state of the processor core.

REFERENCES:
patent: 3473154 (1969-10-01), Couleur et al.
patent: 3585599 (1971-06-01), Hitt
patent: 3681534 (1972-08-01), Burian et al.
patent: 3702989 (1972-11-01), Provenzano, Jr. et al.
patent: 3704363 (1972-11-01), Salmassy et al.
patent: 3707725 (1972-12-01), Dellheim
patent: 3771131 (1973-11-01), Ling
patent: 3794831 (1974-02-01), Frankeny et al.
patent: 3805038 (1974-04-01), Buedel et al.
patent: 3906454 (1975-09-01), Martin
patent: 4205370 (1980-05-01), Hirtle
patent: 4293925 (1981-10-01), Hang et al.
patent: 4423508 (1983-12-01), Shiozaki et al.
patent: 4462077 (1984-07-01), York
patent: 4503495 (1985-03-01), Boudreau
patent: 4511960 (1985-04-01), Boudreau
patent: 4539682 (1985-09-01), Herman et al.
patent: 4553223 (1985-11-01), Bouhelier et al.
patent: 4554661 (1985-11-01), Bannister
patent: 4590550 (1986-05-01), Eilert et al.
patent: 4742466 (1988-05-01), Ochiai et al.
patent: 4783762 (1988-11-01), Inoue et al.
patent: 4835675 (1989-05-01), Kawai
patent: 5058114 (1991-10-01), Kuboki et al.
patent: 5084814 (1992-01-01), Vaglica et al.
patent: 5150470 (1992-09-01), Hicks et al.
patent: 5274811 (1993-12-01), Borg et al.
patent: 5289587 (1994-02-01), Razban
patent: 5404470 (1995-04-01), Miyake
patent: 5434622 (1995-07-01), Lim
patent: 5471594 (1995-11-01), Stone
patent: 5533193 (1996-07-01), Roscoe
patent: 5581691 (1996-12-01), Hsu et al.
patent: 5621886 (1997-04-01), Alpert et al.
patent: 5625785 (1997-04-01), Miura et al.
patent: 5689636 (1997-11-01), Kleber et al.
patent: 5689694 (1997-11-01), Funyu
patent: 5715435 (1998-02-01), Ikei
patent: 5748904 (1998-05-01), Huang et al.
patent: 5751942 (1998-05-01), Christensen et al.
patent: 5812868 (1998-09-01), Moyer et al.
patent: 5832515 (1998-11-01), Ledain et al.
patent: 5848264 (1998-12-01), Baird et al.
patent: 5878208 (1999-03-01), Levine et al.
patent: 5946486 (1999-08-01), Pekowski
patent: 6009270 (1999-12-01), Mann
patent: 6012085 (2000-01-01), Yohe et al.
patent: 6032268 (2000-02-01), Swoboda et al.
patent: 6101180 (2000-08-01), Donahue et al.
patent: 6106573 (2000-08-01), Mahalingaiah et al.
patent: 6256777 (2001-07-01), Ackerman
patent: 6282701 (2001-08-01), Wygodny et al.
patent: 6314530 (2001-11-01), Mann
patent: 6338159 (2002-01-01), Alexander
patent: 6353924 (2002-03-01), Ayers et al.
patent: 6457144 (2002-09-01), Eberhard
patent: 6467083 (2002-10-01), Yamashita
patent: 6487715 (2002-11-01), Chamdani et al.
patent: 6530076 (2003-03-01), Ryan et al.
patent: 6615370 (2003-09-01), Edwards et al.
patent: 6615371 (2003-09-01), McCullough et al.
patent: 6658649 (2003-12-01), Bates et al.
patent: 6684348 (2004-01-01), Edwards et al.
patent: 6687865 (2004-02-01), Dervisoglu et al.
patent: 6732307 (2004-05-01), Edwards
patent: 6754599 (2004-06-01), Swoboda et al.
patent: 6754804 (2004-06-01), Hudepohl et al.
patent: 6802031 (2004-10-01), Floyd et al.
patent: 2001/0054175 (2001-12-01), Watanabe
patent: 2002/0046393 (2002-04-01), Leino et al.
patent: 2002/0147965 (2002-10-01), Swaine et al.
patent: 2 329 048 (1999-10-01), None
patent: 2 329 049 (1999-10-01), None
Chilimbi et al, “Designing a trace format for heap allocation events”, ACM ISMM, pp 35-49, 2000.
Li et al, Design space exploration of cache using compressed trace, ACM ICS, pp 116-125, Jun. 2004.
Pleszkun, Technique for compressing program address traces, ACM MICRO, pp 32-39, 1994.
Netzer et al, “Optimal tracing and incremental reexecuation for debuging long runtime programs”, ACM SIGPLAN, pp 313-325, 1994.
“9403A First-In First-Out (FIFO) Buffer Memory”, Fairchile Semiconductor Corporation, Apr. 1989 (Revised Oct. 2000).
Embedded Trace Macrocell Specification, Rev. 0/0a, ARM IHI 0014C, ARM Ltd. (1999).
MIPS64 5Kc™ Processor Core Datasheet, Revision 1.7.4, pp1-40, Dec. 14, 1999.
MIPS64 5Kc™ Processor Core Datasheet, Revision 1.7.5, pp1-40, Aug. 11, 2000.
MIPS64 5Kc™ Processor Core Datasheet, Revision 2.0, pp1-44, Aug. 28, 2000.
MIPS64™ 5Kf™ Processor Core Datasheet, Revision 00.11, pp1-44, Mar. 30, 2001.
MIPS64 5Kc™ Processor Core Software User's Manual, Revision 2.2, pp1-580, Aug. 11, 2000.
U.S. Appl. No. 09/751,747, filed Dec. 29, 2000, Hudepohl et al.
U.S. Appl. No. 09/751,748, filed Dec. 29, 2000, Hudepohl et al.
F. Chow et al., “Engineering a RISC Compiler System,”IEEE Comp-Con, Mar. 1986, pp. 132-137.
M.D. Smith, “Tracing with Pixie,”Technical Report CSL-TR-91-497, Stanford University, Computer Systems Laboratory, Nov. 1991, pp. 1-29.
ATOM Reference Manual,Digital Equipment Corporation, Massachusetts, Dec. 1993, pp. 1-32.
A. Srivastaba et al., “ATOM: A System for Building Customized Program Analysis Tools,”WRL, Research Report Feb. 1994, Digital Equipment Corporation, Massachusetts, Mar. 1994, pp. 1-23.
ATOM User Manual, Digital Equipment Corporation, Mar. 1994, pp. 1-28.
B. Cmelik et al., “Shade: A Fast Instruction-Set Simulator for Execution Profiling,”Proceedings of the 1994 ACM SIGMETRICS Conference,SIGMETRICS, California, May 1994, pp. 128-137.
MIPS Technologies, “MIPS64 5K™ Processor Core Integrator's Guide,” [Document No. MD00056];MIPS Technologies, Inc.; Rev. 1.2; Aug. 11, 2000; pp. I-II, 1-82.
MIPS Technologies; “MIPS64™ Processor Core Family Integrator's Guide;” [Document No. MD00106]; ©1999-2001MIPS Technologies, Inc.; Rev. 02.00; Jan. 15, 2001; pp. I-VIII, 1-75.
MIPS Technologies; “Core Processor Interface Specification;” [Document No. MD00068];MIPS Technologies, Inc.; Rev. 1.11; Mar. 30, 2001; pp. 1-26.
Susan J. Eggers, et al., “Techniques for Efficient Inline Tracing on a Shared-Memory Multiprocessor,” University of Washington, 1990 ACM, pp. 37-47.
Richard A. Uhlig, et al., “Trace-Driven Memory Simulation: A Survey,” Intel Microcomputer Research Lab; University of Michigan,ACM Computing Surveys, vol. 29, No. 2, Jun. 1997, pp. 128-170.
Eric Rotenberg, et al., “Trace Processors,” University of Wisconsin, 1997IEEE Service Center, 12 pp.
E.N. Elnozahy, “Address Trace Compression Through Loop Detection and Reduction,” ©1999ACM 1-58113-083, pp. 214-215.
Darren Jones, “Opal Coprocessor Interface,”MIP Propietary/Confidential, Jun. 4, 1999, pp. 1-18.
Darren Jones,MIPSS64™ SKC™ Processor Cores User's Manual, Rev. 1.0, Jul. 4, 1999, pp. 6-1 to 6-26.
MIPSS64™ 5KC™Processor Cores User's Manual, Rev. 1.0.1., 1999, pp. 247-276.

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