Static information storage and retrieval – Addressing – Sync/clocking
Reexamination Certificate
2006-06-27
2006-06-27
Nguyen, VanThu (Department: 2824)
Static information storage and retrieval
Addressing
Sync/clocking
C365S189050, C365S189070, C365S233500
Reexamination Certificate
active
07068566
ABSTRACT:
The present invention provides a technique of causing a semiconductor device to output data if a read request not accompanied with an address change is issued. In a first situation in which a write request regarding a first data group is issued, a write operation of the first data group for a first group of memory cells among a set of memory cells selected by the current address is executed. When this occurs, a read operation of a second data group for a second group of memory cells among the set of memory cells is executed on a preliminary basis. The second group of memory cells is different from the first group of memory cells. In a second situation in which a read request for the second data group is issued while the current address is being maintained, the second data group that has been read preliminarily and held is externally output without executing a read operation for the second group of memory cells.
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Mizugaki Koichi
Otsuka Eitaro
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