Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Chip mounted on chip
Reexamination Certificate
2006-08-15
2006-08-15
Mai, Anh D. (Department: 2814)
Active solid-state devices (e.g., transistors, solid-state diode
Combined with electrical contact or lead
Chip mounted on chip
C257S686000, C257S778000, C257S747000, C257S775000
Reexamination Certificate
active
07091619
ABSTRACT:
A method is provided to enhance the connection reliability in three-dimensional mounting while considering the warping of packages. Opening diameters of the openings provided corresponding to protruding electrodes, respectively, are set so as to gradually decrease from the central portion toward the outer peripheral portion of a carrier substrate, and the opening diameters of openings provided corresponding to the protruding electrodes, respectively, are set so as to gradually decrease from the central portion toward the outer peripheral portion of another carrier substrate.
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Communication from Japanese Patent Office re: related application.
Harness & Dickey & Pierce P.L.C.
Kunzer Brian E.
Mai Anh D.
Seiko Epson Corporation
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