Semiconductor device, stacked semiconductor device, methods...

Details Semiconductor device, stacked semiconductor device, methods... Semiconductor device, stacked semiconductor device, methods...

2006-06-13

2006-06-13

Tran, Mai-Huong (Department: 2818)

Active solid-state devices (e.g., transistors, solid-state diode

Combined with electrical contact or lead

Of specified configuration

C257S191000, C257S197000, C257S200000, C257S592000

Reexamination Certificate

active

07061118

ABSTRACT:
A method of manufacturing a semiconductor device having a connection terminal and a substrate on which a circuit section and an electrode are stacked in this order, the circuit section having a multilayer interconnect structure, the electrode being conductively connected to the circuit section, and the connection terminal penetrating the substrate and being conductively connected to the electrode. Part of the connection terminal is formed simultaneously with an interconnect in an interconnect layer of the circuit section.

REFERENCES:
patent: 6608371 (2003-08-01), Kurashima et al.
patent: 6756671 (2004-06-01), Lee et al.
patent: 6828602 (2004-12-01), Asai et al.
patent: A 2000-031145 (2000-01-01), None
patent: A 2001-044357 (2001-02-01), None
patent: A 2002-50738 (2002-02-01), None
patent: A 2003-017558 (2003-01-01), None
patent: A 2003-086589 (2003-03-01), None

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