Method and apparatus for performing on-chip sampling over an...

Details Method and apparatus for performing on-chip sampling over an... Method and apparatus for performing on-chip sampling over an...

2006-10-17

2006-10-17

Nguyen, Ha Tran (Department: 2829)

Electricity: measuring and testing

Fault detecting in electric circuits and of electric components

Of individual circuit component or element

C324S1540PB, C327S091000

Reexamination Certificate

active

07123038

ABSTRACT:
One embodiment of the present invention provides a system that performs voltage sampling over an extended voltage range on a semiconductor chip. During operation, the system receives an input voltage at a node within the semiconductor chip. The system samples the input voltage through a first sampling pathway using NMOS pass gates, which latch the input voltage to produce a first output signal. This first output signal tracks the input voltage from ground up to a cut-off voltage for the nMOS pass gates. The system also samples the input voltage through a second sampling pathway using nMOS pass gates, which latch the input voltage to produce a second output signal. Prior to the NMOS pass gates along the second sampling pathway, the input voltage passes through a source-follower gate, which translates the input voltage down, so that the second output signal tracks the input voltage from a turn-on voltage of the source-follower gate up to Vdd. Next, the system combines the first and second output signals to produce a combined output signal, which tracks the input voltage over the extended voltage range from ground to Vdd.

REFERENCES:
patent: 5084634 (1992-01-01), Gorecki
Applications of On-Chip Samplers for Test and Measurement of Integrated Circuit Ron, Ho et al -Symp. VLSI Ciecuits Dig. Tech Pages, 1998-IEEExplore.org.

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