Semiconductor device with self-aligned junction contact hole...

Active solid-state devices (e.g. – transistors – solid-state diode – Integrated circuit structure with electrically isolated... – Including dielectric isolation means

Reexamination Certificate

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Details

C257S510000, C257S513000

Reexamination Certificate

active

07045875

ABSTRACT:
A plurality of trenches for defining active regions are formed in a semiconductor substrate, using a plurality of trench masks. A gap fill insulating layer is formed on the resulting structure to fill a gap region bounded by the trench and the trench masks. Next, the trench mask and the gap fill insulating layer are patterned to form a trench mask pattern and a gap fill insulating pattern for defining a slit-type opening, extending across and exposes the active region. A gate pattern is formed in the slit-type opening and the trench mask pattern is removed to form a contact opening exposing the active region. Next, a contact plug is formed to fill the contact opening. Here, the contact opening is self-alignedly formed using an etch selectivity between the trench mask and the gap fill insulating layer. The resulting contact opening is a vacancy in a rectangular parallelepiped shape.

REFERENCES:
patent: 6057581 (2000-05-01), Doan
patent: 6432816 (2002-08-01), Kim et al.
patent: 6617216 (2003-09-01), Hu
patent: 11-074526 (1999-03-01), None
English language abstract of Japanese Publication No. 11-074526.

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