Method of forming a contact for multi-level interconnects in an

Details Method of forming a contact for multi-level interconnects in an Method of forming a contact for multi-level interconnects in an

1994-01-03

1995-05-30

Hearn, Brian E.

Fishing, trapping, and vermin destroying

H01L 2144

Patent

active

054200768

ABSTRACT:
A via opening (24) is formed within a semiconductor structure (10) in order to allow for the insertion of a contact to establish multi-level interconnects in an integrated circuit. The via opening (24) extends to a conductive layer (16) within the semiconductor structure (10). During the formation of the via opening (24), a residual layer (26) is created within the via opening (24) and on the exposed surface of the conductive layer (16). A dry plasma material is introduced at the semiconductor structure (10) to remove the residual layer (26) from the via opening (24) and the exposed surface of the conductive layer (16). After removal of the residual layer (26), a conductive material for establishing the contact for connection to the conductive layer (16) is inserted within the via opening (24).

REFERENCES:
patent: 4495220 (1985-01-01), Wolf et al.
patent: 4990467 (1991-02-01), Lee et al.
patent: 5228950 (1993-07-01), Webb et al.
Wolf & Tauber "Silicon Processing for the VLSI Era" vol I Lattice Press 1986 pp. 574-583.
Wolf & Tauber "Silicon Processing for the VLSI Era" vol II Lattice Press 1990 pp. 193, 250, 284.

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