Reducing latency and power in asynchronous data transfers

Details Reducing latency and power in asynchronous data transfers Reducing latency and power in asynchronous data transfers

2006-10-17

2006-10-17

Kim, Kevin (Department: 2611)

Pulse or digital communications

Synchronizers

C375S371000

Reexamination Certificate

active

07123674

ABSTRACT:
Reducing latency and power in the transfer of data between a source and destination domain involves the production of a source-enable signal base on a synchronous-pulse signal. The source-enable signal operates to enable a source register to capture data from a source domain. The source-enable signal may be controlled by a source-inhibit signal. The source-inhibit signal prevents the synchronous-pulse signal from producing the source enable signal and capture clock until data is available for transmission.

REFERENCES:
patent: 5036221 (1991-07-01), Brucculeri et al.
patent: 5450546 (1995-09-01), Krakirian
patent: 6067629 (2000-05-01), Murray et al.
patent: 6384634 (2002-05-01), Brissette et al.

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