Method of fabricatring sub-half-micron trenches and holes

Details Method of fabricatring sub-half-micron trenches and holes Method of fabricatring sub-half-micron trenches and holes

1993-09-20

1995-05-30

Hearn, Brian E.

Fishing, trapping, and vermin destroying

437912, 437203, 148DIG104, H01L 2144

Patent

active

054200679

ABSTRACT:
A non-optical method for the formation of sub-half micron holes, vias, or trenches within a substrate. For example, a substrate having at least two buttresses or a trench having a interbuttress distance or a width of 1.0 to 0.5 microns, respectively, is conformally or non-conformally lined with a layer material. Thereafter, the layer material from horizontal surfaces is removed to expose the substrate underneath while leaving the layer material attached to the essentially vertical walls of the buttresses or the trenches essentially intact, thereby, narrowing the interbuttress distance or the trench width, respectively, to sub-half micron dimensions. The exposed substrate surface is then subjected to anisotropic etching to form sub-half micron trenches, holes or vias in the substrate. Finally, the buttresses and layer material are removed from the substrate. Alternatively, a template of buttresses or channel glass having openings, lined with layer material, on the order of sub-half micron widths is placed on a substrate prior to anisotropic etching to form sub-half micron holes, vias or trenches within the substrate. The template is then removed leaving a substrate surface containing sub-half micron trenches, holes or vias. The template structure once made can be used repeatedly.

REFERENCES:
patent: 4599790 (1986-07-01), Kim et al.
patent: 4759822 (1988-07-01), Vetanen et al.
patent: 4774206 (1988-09-01), Willer
patent: 4857477 (1989-08-01), Kanamori
patent: 4947413 (1990-08-01), Jewell et al.
patent: 4968646 (1990-11-01), Blanchard et al.
patent: 5089913 (1992-02-01), Singh et al.
patent: 5102827 (1992-04-01), Chen et al.
patent: 5110760 (1992-05-01), Hsu
patent: 5231040 (1993-07-01), Shimura
patent: 5288654 (1994-02-01), Kasai et al.
Riley et al., Limitation of low-temperature low pressure chemical vapor dsition of SiO.sub.2 for the insulation of high-density multilevel very large scale integrated circuits, J. Vac. Sci. Technol. B 7 (2), Mar./Apr. 1989, FIGS. 2 and 3, pp. 230-231.
Hatanaka et al., H.sub.2 O-TEOS Plasma-CVD Realizing Dielectrics Having a Smooth Surface, VMIC Conference, Jun. 11-12, TH-0359-0/91/0000-0435 $01.00 C 1991 IEEE, FIGS. 2 and 3, p. 438.
Lai et al., CVD-Aluminium for Submicron VLSI Metallization, VMIC Conference, Jun. 11-12, TH-0359-0/91/0000-0089 $01.00 C 1991 IEEE, FIGS. 2 and 3, p. 94.
Rey et al., Numerical Simulation of CVD Trench Filling Using a Surface Reaction Coefficient Model, VMIC Conference, Jun. 12-13, TH-0325-1/90/0000-0425 $01.00 C 1990 IEEE, FIGS. 3 and 5, p. 426.
Ahn et al., Advances in Production Methods in VLSI and ULSI Technology Using Isolated-Chamber Sputter Deposition of Al 1% Si Films, VMIC Conference, Jun. 12-13, TH-0325-0/90/0000-0325 $01.00 C 1990 IEEE, FIGS. 2, 3, 4 and 6, pp. 327-328.
Raaijmakers et al., Contact Hole Fill with Low Temperature LPCVD TiN, Jun. 12-13, TH-0325-1/90/0000-0219 $01.00 C 1990 IEEE, FIG. 1a, p. 222.

Affiliated with

Also associated with

Rating

Method of fabricatring sub-half-micron trenches and holes does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Method of fabricatring sub-half-micron trenches and holes, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method of fabricatring sub-half-micron trenches and holes will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-361514