High slew ECL device and method therefor

Details High slew ECL device and method therefor High slew ECL device and method therefor

2006-10-31

2006-10-31

Nguyen, Patricia (Department: 2817)

Amplifiers

With semiconductor amplifying device

Including differential amplifier

C330S302000

Reexamination Certificate

active

07129781

ABSTRACT:
In one embodiment, an ECL logic device uses a capacitor to couple a positive voltage to an output and reduce the rise time of the output signal.

REFERENCES:
patent: 5477190 (1995-12-01), Brehmer et al.
patent: 5521555 (1996-05-01), Tazartes et al.
patent: 5990737 (1999-11-01), Czarnul et al.
patent: 6580325 (2003-06-01), Aude
patent: 6882226 (2005-04-01), Cho et al.
“An Outline of Design Techniques for Linear Integrated Circuits”, by Hans R. Camenzind and Alan B. Grebene, IEEE Journal of Solid State Circuits, vol. SC-4, No. 3, Jun. 1969, pp. 110-122.

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