Low voltage non-volatile memory cells using twin bit line...

Details Low voltage non-volatile memory cells using twin bit line... Low voltage non-volatile memory cells using twin bit line...

2006-03-28

2006-03-28

Yoha, Connie C. (Department: 2827)

Static information storage and retrieval

Floating gate

Particular biasing

C365S185010, C365S185050, C365S185260

Reexamination Certificate

active

07020020

ABSTRACT:
A non-volatile memory cell operating at low voltage by means of impact ionization for programming. Impact ionization arises from a charge injector, such as a diode, created in the substrate of a floating gate charge storage transistor. The charge supply is biased by push-pull voltages applied to the charge storage transistor, while another floating gate transistor assists in reading the charge state of the charge storage transistor. The other transistor switches current from a sense transistor associated with a sense line, the current switching between two bit lines depending on the charge state of the charge storage transistor. In other words, the switched current appears in one of two bit lines, one bit line indicating stored charge and the other indicating the absence of stored charge, i.e. digital zero and one, positively indicated in the two bit lines.

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