Software shared memory bus

Details Software shared memory bus Software shared memory bus

2006-05-02

2006-05-02

Dam, Tuan (Department: 2192)

Data processing: software development, installation, and managem

Software program development tool

Testing or debugging

C711S141000, C711S147000

Reexamination Certificate

active

07039901

ABSTRACT:
The invention relates to a method for transparently maintaining cache coherency when debugging a multiple processor system with common shared memory. A software memory map representing the memory usage of the processors in the system to be debugged is created and in the software memory map is an indication of whether or not each processor has a cache. At least two debug sessions associated with two processors are activated. If an active debug session requests a write to a shared memory location, the request is executed and the software memory map is searched to located all processors having read access to that shared memory location. The write request is broadcast to each of the located processors so that each processor can perform any required cache updates.

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