Multiplex communications – Pathfinding or routing – Switching a message which includes an address header
Reexamination Certificate
2006-09-19
2006-09-19
Nguyen, Chau (Department: 2616)
Multiplex communications
Pathfinding or routing
Switching a message which includes an address header
C370S401000, C711S108000
Reexamination Certificate
active
07110407
ABSTRACT:
A digital signal processor. The digital signal processor includes a first data classification block. The first data classification block outputs a first block priority number associated with a first data stored in the first data classification block that matches a search key. The digital signal processor includes a second data classification block. The second data classification block outputs a second priority number associated with a second data stored in the second data classification block that matches the search key. The digital signal processor includes a device index processor. The device index processor selects a most significant block priority number from the first block priority number and the second block priority number.
REFERENCES:
patent: 3257646 (1966-06-01), Roth
patent: 3353159 (1967-11-01), Lee, III
patent: 3602899 (1971-08-01), Lindquist et al.
patent: 3675211 (1972-07-01), Raviv
patent: 3685020 (1972-08-01), Meade
patent: 3868642 (1975-02-01), Sachs
patent: 4112502 (1978-09-01), Scheuneman
patent: 4244033 (1981-01-01), Hattori
patent: 4472805 (1984-09-01), Wacyk et al.
patent: 4523301 (1985-06-01), Kadota
patent: 4646271 (1987-02-01), Uchiyama
patent: 4656626 (1987-04-01), Yudichak et al.
patent: 4670858 (1987-06-01), Almy
patent: 4747080 (1988-05-01), Yamada
patent: 4758982 (1988-07-01), Price
patent: 4780845 (1988-10-01), Threewitt
patent: 4785398 (1988-11-01), Joyce et al.
patent: 4791606 (1988-12-01), Threewitt et al.
patent: 4813002 (1989-03-01), Joyce et al.
patent: 4845668 (1989-07-01), Sano et al.
patent: 4903234 (1990-02-01), Sakaraba et al.
patent: 4928260 (1990-05-01), Chuang et al.
patent: 4958377 (1990-09-01), Takahashi
patent: 4959811 (1990-09-01), Szczepanek
patent: 4975873 (1990-12-01), Nakabayashi et al.
patent: 4996666 (1991-02-01), Duluk, Jr.
patent: 5010516 (1991-04-01), Oates
patent: 5014195 (1991-05-01), Farrell et al.
patent: 5036486 (1991-07-01), Noguchi et al.
patent: 5051948 (1991-09-01), Watabe et al.
patent: 5053991 (1991-10-01), Burrows
patent: 5072422 (1991-12-01), Rachels
patent: 5107501 (1992-04-01), Zorian
patent: 5111427 (1992-05-01), Kobayashi et al.
patent: 5226005 (1993-07-01), Lee et al.
patent: 5239642 (1993-08-01), Gutierrez et al.
patent: 5265100 (1993-11-01), McClure et al.
patent: 5319763 (1994-06-01), Ho et al.
patent: 5383146 (1995-01-01), Threewitt
patent: 5414704 (1995-05-01), Spinney
patent: 5422838 (1995-06-01), Lin
patent: 5440709 (1995-08-01), Edgar
patent: 5454094 (1995-09-01), Montove
patent: 5455576 (1995-10-01), Clark, II et al.
patent: 5469161 (1995-11-01), Bezek
patent: 5485418 (1996-01-01), Hiraki et al.
patent: 5490102 (1996-02-01), Jurbran
patent: 5491703 (1996-02-01), Barnaby et al.
patent: 5513134 (1996-04-01), Cooperman et al.
patent: 5517441 (1996-05-01), Dietz et al.
patent: 5557747 (1996-09-01), Rogers et al.
patent: 5621677 (1997-04-01), Jones
patent: 5642322 (1997-06-01), Yoneda
patent: 5649149 (1997-07-01), Stormon et al.
patent: 5706224 (1998-01-01), Srinivasan et al.
patent: 5745488 (1998-04-01), Thompson et al.
patent: 5818786 (1998-10-01), Yoneda
patent: 5818873 (1998-10-01), Wall et al.
patent: 5841874 (1998-11-01), Kempke et al.
patent: 5860085 (1999-01-01), Stormon et al.
patent: 5870324 (1999-02-01), Helwig
patent: 5893931 (1999-04-01), Peng et al.
patent: 5914956 (1999-06-01), Williams
patent: 5920886 (1999-07-01), Feldmeier
patent: 5930359 (1999-07-01), Kempke et al.
patent: 5946704 (1999-08-01), Yoneda et al.
patent: 5949696 (1999-09-01), Threewitt
patent: 6000008 (1999-12-01), Simcoe
patent: 6006306 (1999-12-01), Haywood et al.
patent: 6011795 (2000-01-01), Varghese et al.
patent: 6065064 (2000-05-01), Satoh et al.
patent: 6081440 (2000-06-01), Washburn et al.
patent: 6377577 (2002-04-01), Bechtolsheim et al.
patent: 6415354 (2002-07-01), Joffee et al.
patent: 6457051 (2002-09-01), Riddle et al.
patent: 6470418 (2002-10-01), Lien et al.
patent: 6708250 (2004-03-01), Gillingham
patent: 6748484 (2004-06-01), Henderson et al.
patent: 6778498 (2004-08-01), McDysan
patent: 0 267 612 (1988-05-01), None
patent: 0 381 249 (1990-08-01), None
patent: 0 660 332 (1995-06-01), None
patent: 08167295 (1996-06-01), None
patent: 08273376 (1996-10-01), None
patent: 0 774 758 (1997-05-01), None
patent: 0 872 802 (1998-10-01), None
patent: WO 98/12651 (1998-03-01), None
patent: WO 99/31581 (1999-06-01), None
Advanced Micro Devices, “Final Am99C10A 256×48 Content Addressable Memory” Publication No. 08125, Rev. G, Dec. 1992, pp. 1-21.
Masao Akata. “A Scheduling Content-Addressable Memory for ATM Space-Division Switch Control”, IEEE International Solid-State Circuits Conference, Feb. 1991, New York.
Soo-Ik Chae et al., “Content-Addressable Memory for VLSI Pattern Inspection”. IEEE Journal of Solid State Circuits, vol. 23, No. 1, Feb. 1988, pp. 74-78.
Cisco Systems, Inc., “Policy-Based Routing”, 1996, pp. 1-7.
GEC Plessey Semiconductors, “P2800 Multi-Port Content Addressable Memory”, Functional Product Specification GPS-FPS-2800-12, Jan. 1996.
GEC Plessey Semiconductors, “P2800 2K×64 Bit Multi-Port Content Addressable Memory”, Preliminary Information, Feb. 1997, pp. 1-15.
Kanad Ghose, “Response Pipelined CAM Chips: The First Generation and Beyond.”, 7th International Conference on VLSI Design, Jan. 1994, pp. 365-368.
Pankaj Gupta et al., “Routing Lookups in Hardware at Memory Access Speeds”, Proc. Infocom, Apr. 1998, 8 pgs.
Pankaj Gupta and Nick McKeown. “Packet Classification on Multiple Fields”. SIGCOMM (Sep. 2, 1999), 14 pages.
Simon R. Jones et al., “A 9-kbit Associative Memory for High Speed Parallel Processing Applications”, IEEE Journal or Solid-State Circuits, vol. 23, No. 2, Apr. 1988, pp. 543-548.
Hiroshi Kadota et al., “An 8-kbit Content-Addressable and Reentrant Memory”, IEEE Journal of Solid-State Circuits, vol. SC-20, No. 5, Oct. 1985, pp. 951-956.
KLSI KE5B064A1 Address Processor Ver. 2.0.2 Preliminary (believed to be published late 1995 or early 1996).
KLSI KE5B064H Series Address Processor Ver. 1.0.1 (believed to be published in late 1995 or early 1996).
Masayoshi Kobayashi et al., “A 50Mpps Longest Prefix Match Search Engine LSI for Multigigabit IP Forwarding”, Technical Report of IEICE IN08-119, Nov. 1998, pp. 7-12.
T.V. Lakshman and D. Stiliadis, “High-Speed Policy-Based Packet Forwarding Using Efficient Multi-Dimensional Range Matching”, SIGCOMM, 1988, pp. 203-214.
Landrock et al., “Associative Storage Module”, IBM Technical Disclosure Bulletin, vol. 25, No. 5, Oct. 1992, pp. 2341-2342.
Anthony McAuley et al., “A Self-Testing Reconfigurable CAM”, IEEE Journal of Solid-State Circuits, vol. 26, No. 3, Mar. 1991, pp. 257-261.
Motorola Semiconductor Technical Data, “Advanced Information 16K×64 CAM”, MCM69C432, Jan. 1996, 4 pages.
MUSIC Semiconductors, “MU9C1480 LANCAM” Advance Information, Mar. 22, 1990, pp. 1-11.
MUSIC Semiconductors, “MU9C1480 LANCAM Handbook”, Nov. 1994.
MUSIC Semiconductors, “MU9C2480 LANCAM” Preliminary Data Sheet, Aug. 25, 1995, pp. 1-24.
MUSIC Semiconductors, “MUAA CAM Family” Advanced Information, Feb. 24, 1998, Rev. 0, pp. 1-16.
MUSIC Semiconductors, Advance Information, “MUAA Routing CoProcessor (RCP) Family”, (Oct. 1, 1998), Rev. 1b, pp. 1-16.
Takeshi Ogura et al., “A 4-kbit Associative Memory LSI”, IEEE Journal of Solid-State Circuit, vol. SC-20, No. 6, Dec. 1985, pp. 1277-1281.
Sergio R. Ramirez-Chavez, “Encoding Don't Cares in Static and Dynamic Content-Addressable Memories”, Transaction Briefs, IEEE Transactions on Circuits and System-II: Analog and Digital Signal Processing, vol. 39, No. 8, Aug. 1992, pp. 575-578.
Ian N. Robinson, “Pattern Addressable Memory”, IEEE Micro, Jun. 1992, pp. 20-30.
Yong-Chui Shin et al., “A Special-Purpose Content Addressable Memory Chip for Real-Time Image Processing
Davis Cynthia L.
Netlogic Microsystems Inc.
Shemwell Mahamedi LLP
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