Data processing: structural design – modeling – simulation – and em – Simulating electronic device or electrical system – Circuit simulation
Reexamination Certificate
2006-07-04
2006-07-04
Picard, Leo (Department: 2123)
Data processing: structural design, modeling, simulation, and em
Simulating electronic device or electrical system
Circuit simulation
C716S030000
Reexamination Certificate
active
07072817
ABSTRACT:
A method for designing an integrated circuit where the integrated circuit includes a plurality of modules and where each module includes an initiator port and a target port coupled to a distributed routing network. The initiator port is implemented by configuring whether the initiator or the distributed routing network is responsible for ordering responses to requests issued by the initiator port and defining the maximum number of requests that are permitted to be outstanding at the same time. The initiator port is further configured to define whether a delay stage is required in said initiator port. The distributed routing network is defined by the number of routing resources between the initiator and the target, an arbitration method for arbitrating between requests and an association between the routing resources and the targets.
REFERENCES:
patent: 4682284 (1987-07-01), Schrofer
patent: 4814981 (1989-03-01), Rubinfeld
patent: 5251311 (1993-10-01), Kasai
patent: 5386565 (1995-01-01), Tanaka et al.
patent: 5394540 (1995-02-01), Barrington et al.
patent: 5423050 (1995-06-01), Taylor et al.
patent: 5434804 (1995-07-01), Bock et al.
patent: 5440705 (1995-08-01), Wang et al.
patent: 5448576 (1995-09-01), Russell
patent: 5452432 (1995-09-01), Macachor
patent: 5455936 (1995-10-01), Maemura
patent: 5479652 (1995-12-01), Dreyer et al.
patent: 5483518 (1996-01-01), Whetsel
patent: 5488688 (1996-01-01), Gonzales et al.
patent: 5530965 (1996-06-01), Kawasaki et al.
patent: 5570375 (1996-10-01), Tsai et al.
patent: 5590354 (1996-12-01), Klapproth et al.
patent: 5596734 (1997-01-01), Ferra
patent: 5598551 (1997-01-01), Barajas et al.
patent: 5608881 (1997-03-01), Masumura et al.
patent: 5613153 (1997-03-01), Arimilli et al.
patent: 5627842 (1997-05-01), Brown et al.
patent: 5657273 (1997-08-01), Ayukawa et al.
patent: 5680585 (1997-10-01), Bruell
patent: 5682545 (1997-10-01), Kawasaki et al.
patent: 5689713 (1997-11-01), Normoyle et al.
patent: 5704034 (1997-12-01), Circello
patent: 5708773 (1998-01-01), Jeppesen, III et al.
patent: 5724549 (1998-03-01), Selgas et al.
patent: 5726985 (1998-03-01), Daniel et al.
patent: 5732213 (1998-03-01), Gessel et al.
patent: 5737516 (1998-04-01), Circello et al.
patent: 5748617 (1998-05-01), McLain, Jr.
patent: 5751621 (1998-05-01), Arakawa
patent: 5768152 (1998-06-01), Battaline et al.
patent: 5771240 (1998-06-01), Tobin et al.
patent: 5774701 (1998-06-01), Matsui et al.
patent: 5778237 (1998-07-01), Yamamoto et al.
patent: 5781558 (1998-07-01), Inglis et al.
patent: 5796978 (1998-08-01), Yoshioka et al.
patent: 5828825 (1998-10-01), Eskandari et al.
patent: 5832248 (1998-11-01), Kishi et al.
patent: 5835963 (1998-11-01), Yoshioka et al.
patent: 5848247 (1998-12-01), Matsui et al.
patent: 5860127 (1999-01-01), Shimazaki et al.
patent: 5862362 (1999-01-01), Somasegar et al.
patent: 5862387 (1999-01-01), Songer et al.
patent: 5867726 (1999-02-01), Ohsuga et al.
patent: 5884092 (1999-03-01), Kiuchi et al.
patent: 5889954 (1999-03-01), Gessel et al.
patent: 5892947 (1999-04-01), DeLong et al.
patent: 5896550 (1999-04-01), Wehunt et al.
patent: 5907485 (1999-05-01), Van Loo et al.
patent: 5918045 (1999-06-01), Nishii et al.
patent: 5920711 (1999-07-01), Seawright et al.
patent: 5930523 (1999-07-01), Kawasaki et al.
patent: 5930833 (1999-07-01), Yoshioka et al.
patent: 5931961 (1999-08-01), Ranganathan et al.
patent: 5937165 (1999-08-01), Schwaller et al.
patent: 5944841 (1999-08-01), Christie
patent: 5950012 (1999-09-01), Shiell et al.
patent: 5953538 (1999-09-01), Duncan et al.
patent: 5954829 (1999-09-01), McLain et al.
patent: 5956477 (1999-09-01), Ranson et al.
patent: 5960191 (1999-09-01), Sample et al.
patent: 5970069 (1999-10-01), Kumar et al.
patent: 5978870 (1999-11-01), Warren
patent: 5978874 (1999-11-01), Singhal et al.
patent: 5978902 (1999-11-01), Mann
patent: 5982749 (1999-11-01), Daniel et al.
patent: 5983017 (1999-11-01), Kemp et al.
patent: 5983379 (1999-11-01), Warren
patent: 6080203 (2000-06-01), Njinda et al.
patent: 6086628 (2000-07-01), Dave et al.
patent: 6134516 (2000-10-01), Wang et al.
patent: 6134690 (2000-10-01), Ivaturi et al.
patent: 6185203 (2001-02-01), Berman
patent: 6195593 (2001-02-01), Nguyen
patent: 6249528 (2001-06-01), Kothary
patent: 6269330 (2001-07-01), Cidon et al.
patent: 6317804 (2001-11-01), Levy et al.
patent: 6353618 (2002-03-01), Hung et al.
patent: 6421808 (2002-07-01), McGeer et al.
patent: 6460174 (2002-10-01), Carey
patent: 6466898 (2002-10-01), Chan
patent: 6549882 (2003-04-01), Chen et al.
patent: 6591369 (2003-07-01), Edwards et al.
patent: 6697385 (2004-02-01), Matthews
patent: 6751698 (2004-06-01), Deneroff et al.
patent: 6826191 (2004-11-01), Jones et al.
patent: 0165600 (1991-11-01), None
patent: 0636976 (1995-02-01), None
patent: 0636976 (1995-02-01), None
patent: 0652516 (1995-05-01), None
patent: 0702239 (1996-03-01), None
patent: 0720092 (1996-07-01), None
patent: 0933926 (1999-08-01), None
patent: 0945805 (1999-09-01), None
patent: 0959411 (1999-11-01), None
patent: 8320796 (1996-12-01), None
patent: 8329687 (1996-12-01), None
patent: 9212358 (1997-08-01), None
patent: 9311786 (1997-12-01), None
patent: 10106269 (1998-04-01), None
patent: 10124484 (1998-05-01), None
patent: 10177520 (1998-06-01), None
patent: PCT/JP96/02819 (1996-09-01), None
Yang et al., “Design and Analysis of Multiple-Bus Arbiters with Different Priority Schemes”, International Conference on Databases, Parallel Architectures and Their Applications, Mar. 1990, pp. 238-247
Tamir et al., “Symmetric Crossbar Arbiters for VLSI Communication Switches”, IEEE transactions on Parallel and Distributed Systems, Jan. 1993, pp. 13-27.
Creveuil et al., Formal Specification and Design of a Message Router, ACM 1994.
Chou et al., IPCHINOOK: An Integrated IP-based Design Framework for Distributed Emebedded Ssytems, ACM 1999.
DAME: A Rule Based Designer of Microprocessor Based Systems, ACM 1989.
Dennis et al., Building Blocks for Data Flow Prototypes, IEEE 1980.
Alexander et all, Active Bridging, ACM 1997.
Vercauteren et al., Constructing Application-Specific Heterogeneous Embedded Architectures from Custom HW/SW Applications, ACM 1996.
Richard York; Real Time Debug for System-on-Chip Devices; Jun. 1999; pp. 1-6.
Jorgenson Lisa K.
Kubida William J.
Picard Leo
Stevens Tom
STMicroelectronics Ltd.
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