Method for manufacturing semiconductor device having bipolar tra

Details Method for manufacturing semiconductor device having bipolar tra Method for manufacturing semiconductor device having bipolar tra

1994-05-04

1995-05-30

Fourson, George

Fishing, trapping, and vermin destroying

437 27, 437 28, 437 47, 437 51, 437 89, 437918, 148DIG10, 148DIG11, 148DIG136, 257379, 257380, H01L 21265

Patent

active

054200539

ABSTRACT:
A collector region is formed in a semiconductor substrate. An insulating layer is formed on the semiconductor substrate, and a non-monocrystalline silicon layer is deposited thereon. The non-monocrystalline silicon layer is annealed to obtain a polycrystalline silicon layer which is patterned into a polycrystalline silicon resistor. The polycrystalline silicon resistor is covered by an insulating layer. Thereafter, a base region is formed, and an emitter region is formed in the base region.

REFERENCES:
patent: 4084986 (1978-04-01), Aoki et al.
patent: 4467519 (1984-08-01), Glang et al.
patent: 4762801 (1988-08-01), Kapoov
patent: 4824799 (1989-04-01), Komatsu
patent: 5024957 (1991-06-01), Harane et al.
patent: 5110757 (1992-05-01), Arst et al.
patent: 5139959 (1992-08-01), Craft et al.
patent: 5252143 (1993-10-01), Chiang et al.
patent: 5296391 (1994-03-01), Sato et al.
patent: 5356830 (1994-10-01), Yoshikawa et al.

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