Method and arrangement for changing parallel clock signals...

Details Method and arrangement for changing parallel clock signals... Method and arrangement for changing parallel clock signals...

2006-09-19

2006-09-19

Corrielus, Jean B (Department: 2611)

Pulse or digital communications

Synchronizers

Synchronizing the sampling time of digital data

C375S356000, C375S357000, C375S358000, C370S518000, C370S519000, C331S025000

Reexamination Certificate

active

07110484

ABSTRACT:
A changeover arrangement for the clock signals of parallel transmission connections of an assured data transmission link, wherein a clock signal is sent for the transmission paths by parallel outdoor units (OU) located in succession to a common indoor unit (IU), the clock signal is received by a corresponding set of second outdoor units, where phase locked loop signals are used to achieve the lock to the signal, and subsequent to which a second IU receives information of the mode of the phase lock. In addition, when errors are caused in the employed connection, the receiving unit selects a transmission path that has fewer errors based on mode information obtained from the outdoor unit.

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