Pulse or digital communications – Equalizers
Reexamination Certificate
2006-05-16
2006-05-16
Le, Amanda T. (Department: 2634)
Pulse or digital communications
Equalizers
C375S231000, C708S316000, C708S400000
Reexamination Certificate
active
07046723
ABSTRACT:
A digital and a multiplication method are described, which lead to an efficient architecture for a hardware implementation of digital FIR and IIR filters into FPGAs. The multiplications of input sample data and delayed sample data with filter coefficients are performed by addressing look-up tables in which corresponding multiplication results are prestored. The size of the look-up tables is reduced by storing only those multiplication results which cannot be obtained by a shifting operation performed on the other pre-stored multiplication results, the input sample data, or the delayed sample data. Thereby, the size of the look-up tables can be compressed significantly such that an implementation of large digital filters into FPGAs is possible.
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Askeroth Jonas
Schier Thorsten
Sjoberg Greger
Le Amanda T.
Nokia Corporation
Squire Sanders & Dempsey LLP
Ware Cicely
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