Method for fabricating semiconductor device with fine pattern

Semiconductor device manufacturing: process – Chemical etching – Vapor phase etching

Reexamination Certificate

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Details

C438S618000, C438S637000, C438S610000

Reexamination Certificate

active

07074722

ABSTRACT:
The present invention relates to a method for fabricating a semiconductor device with a fine pattern. The method includes the steps of: (a) forming a semiconductor substrate structure including a substrate, a nitride layer for forming a hard mask, a plurality of conductive patterns, an etch stop layer, an inter-layer insulation layer, an anti-reflective coating (ARC) layer and a photoresist pattern; (b) selectively etching the ARC layer and the nitride layer with use of the photoresist pattern as an etch mask to form a hard mask; (c) removing the photoresist pattern and the ARC layer; (d) etching the inter-layer insulation layer disposed between the conductive patterns by using the hard mask as an etch mask to form a contact hole exposing the etch stop layer; (e) removing the etch stop layer formed at a bottom area of the contact hole to expose the substrate; and (f) forming a plug electrically contacted to the exposed substrate, wherein the steps (b) and (d) to (e) proceeds in an in situ condition.

REFERENCES:
patent: 6265296 (2001-07-01), Yen et al.
patent: 6475906 (2002-11-01), Lee
patent: 2003/0066545 (2003-04-01), Chang et al.
patent: 2004/0038546 (2004-02-01), Ko
patent: 2005/0090055 (2005-04-01), Lee et al.
patent: 1020000014605 (2000-03-01), None

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