Semiconductor integrated circuit with dummy patterns

Details Semiconductor integrated circuit with dummy patterns Semiconductor integrated circuit with dummy patterns

2006-04-04

2006-04-04

Clark, S. V. (Department: 2823)

Active solid-state devices (e.g., transistors, solid-state diode

Housing or package

With contact or lead

C257S758000

Reexamination Certificate

active

07023080

ABSTRACT:
A semiconductor integrated circuit includes a plurality of layers provided on a semiconductor substrate, wires provided in a first layer that is one of the plurality of layers, and wire dummies provided in a second layer different from the first layer and having an arrangement that avoids areas overlapping positions of the wires.

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Office Action from Japanese Patent Office dated Jun. 21, 2005, for Japanese Patent Application No. 2001-322814.

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