Semiconductor integrated circuit device

Static information storage and retrieval – Interconnection arrangements

Reexamination Certificate

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C365S230060, C257S369000, C257S401000

Reexamination Certificate

active

07016214

ABSTRACT:
A semiconductor integrated circuit device capable of achieving higher integration and simplification of manufacturing processes is provided. Circuitry is provided which includes a first N-channel MOSFET and a first p-channel MOSFET each having a gate insulating dielectric film with a first film thickness, wherein a poly-silicon layer making up a gate electrode is doped with an N-type impurity. The circuitry also includes a second N-channel MOSFET having a gate insulator film with a second film thickness thinner than the first thickness, wherein an N-type impurity is doped into a polysilicon layer making up a gate electrode, and a second P-channel MOSFET with a P-type impurity being doped into a polysilicon layer making up a gate electrode. The gate electrodes of the first N-channel MOSFET and first P-channel MOSFET are integrally formed and mutually connected together.

REFERENCES:
patent: 5418387 (1995-05-01), Nakamura et al.
patent: 5572480 (1996-11-01), Ikeda et al.
patent: 6236258 (2001-05-01), Hoenigschmid et al.
patent: 6448596 (2002-09-01), Kawajiri et al.
patent: 2003/0183860 (2003-10-01), Uchiyama et al.
patent: 10-050957 (1996-08-01), None

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