Method and circuitry for compensating for negative internal grou

Details Method and circuitry for compensating for negative internal grou Method and circuitry for compensating for negative internal grou

1986-07-02

1990-04-24

James, Andrew J.

Electrical transmission or interconnection systems

Nonlinear reactor systems

Parametrons

307456, 307443, 307549, H03K 19003, H03K 19088, H03K 1716, H03K 1760

Patent

active

049202863

ABSTRACT:
The specification discloses circuitry for compensating integrated circuits for negative internal ground voltage glitches. An output transistor (30) receives input signals at its base and has an emitter connected through a Schottky diode (32) to internal circuit ground. The compensation circuit includes a transistor (42) coupled to the base of transistor (30) and having an emitter also coupled to internal circuit ground. A capacitor (44) is connected between the base of transistor (42) and a source of bias voltage. Transistor (42) is rendered conductive by the occurrence of negative voltage glitches on the circuit ground, thus reducing voltage on the base of transistor (30) to prevent premature conduction by transistor (30).

REFERENCES:
patent: 3999080 (1976-12-01), Weathersby Jr. et al.
patent: 4321490 (1982-03-01), Bechdolt
patent: 4330723 (1982-05-01), Griffith
patent: 4581550 (1986-04-01), Ferris et al.
patent: 4593210 (1986-06-01), Boyer
patent: 4644194 (1987-02-01), Birrittella et al.

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