Image processing circuit

Details Image processing circuit Image processing circuit

2006-04-25

2006-04-25

Ye, Lin (Department: 2615)

Television

Camera, system and detail

Combined image signal generator and general image signal...

C348S305000, C348S230100

Reexamination Certificate

active

07034868

ABSTRACT:
A pixel clock is switched to a high speed for reading culled pixel data from a CCD or switched to a low speed for reading all pixels from the CCD when picking up an image of an object, so that a main memory stores a first field initially read from the CCD and an RPU reads the first field from the main memory in synchronization with reading of a subsequent second field for executing a series of image processing in real time. The main memory stores the processed data. A CPU reads the processed data from the main memory, compresses the processed data and thereafter stores the same in a storage medium. Thus provided is an image processing circuit capable of increasing a frame rate for finder display and efficiently executing image processing at a high speed.

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