Semiconductor memory device

Details Semiconductor memory device Semiconductor memory device

2006-07-25

2006-07-25

Nguyen, Tuan T. (Department: 2824)

Static information storage and retrieval

Floating gate

Particular biasing

C365S185180, C365S185240, C365S185260

Reexamination Certificate

active

07082057

ABSTRACT:
A semiconductor memory device includes a field-effect transistor provided on a surface of a P-type transistor substrate. The field-effect transistor includes two N-type diffusion layer regions, a gate electrode, and a charge storage section. By applying a reference voltage to one of the N-type diffusion layer regions, a voltage higher than the reference voltage to the other of the N-type diffusion layer regions, a voltage lower than the reference voltage to the gate electrode, and a voltage higher than the reference voltage to the P-type semiconductor substrate, holes are injected into the charge storage section. Because the forward voltage is applied to a PN junction between one of the N-type diffusion layer regions and the P-type semiconductor substrate, it is possible to inject the holes into the charge storage section at the voltages lower than the voltages required if the forward voltage is not applied. Therefore, it is possible to decrease operating voltages of the semiconductor memory device. Thus provided is a semiconductor memory device including a field-effect-transistor type non-volatile memory that allows for rewrite operation at lower voltages.

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