Electrical computers and digital processing systems: processing – Processing architecture – Array processor
Reexamination Certificate
2006-01-24
2006-01-24
Kim, Kenneth S. (Department: 2111)
Electrical computers and digital processing systems: processing
Processing architecture
Array processor
C712S016000, C712S033000, C710S031000
Reexamination Certificate
active
06990566
ABSTRACT:
A method and an apparatus for configuration of multiple context processing elements (MCPEs) are described. The method and an apparatus is capable of selectively transmitting data over a bidirectional shared bus network including a plurality of channels between pairs of MCPEs in the networked array. The method and an apparatus then selectively transmits a sideband bit indicating a direction in which the data is transmitted in the shared bus network.
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Eslick Ian
French Robert
Mirsky Ethan
Christie Parker & Hale, LLP.
Kim Kenneth S.
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