Computer graphics processing and selective visual display system – Plural physical display element control system – Display elements arranged in matrix
Reexamination Certificate
2006-03-28
2006-03-28
Awad, Amr A. (Department: 2673)
Computer graphics processing and selective visual display system
Plural physical display element control system
Display elements arranged in matrix
C345S092000, C345S100000
Reexamination Certificate
active
07019727
ABSTRACT:
The retaining circuit110,which retains the digital image signal fed from the drain signal line61in response to the signal inputted from gate signal line51,is formed. The signal selection circuit120,which selects one of the two signals (signal A or signal B) in response to the signal from the retaining circuit110and which supplies the selected signal to the display electrode80,is formed. Also, the reference voltage generation circuit500,which provides the signal A and signal B, is formed within the display panel100.When the display device is under the digital display mode, the reference voltage generation circuit500prepares the signal fed to the display electrode80.Thus, there is no need to supply the signal A or signal B from outside, resulting in the simpler configuration of the external circuits. Also, since the drive of the external circuits can be completely halted under the digital display mode, it is possible to further reduce the consumption of the electric power.
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European Office Action dated Apr. 18, 2005, directed to counterpart EP application.
Awad Amr A.
Morrison & Foerster / LLP
Sanyo Electric Co,. Ltd.
Shapiro Leonid
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