Method for reducing shallow trench isolation consumption in...

Details Method for reducing shallow trench isolation consumption in... Method for reducing shallow trench isolation consumption in...

2006-01-24

2006-01-24

Picardat, Kevin M. (Department: 2822)

Semiconductor device manufacturing: process

Formation of electrically isolated lateral semiconductive...

Grooved and refilled with deposited dielectric material

C438S242000, C257S501000, C257S506000

Reexamination Certificate

active

06989318

ABSTRACT:
A method for reducing shallow trench isolation (STI) consumption during semiconductor device processing includes forming a hardmask over a semiconductor substrate, patterning the hardmask and forming a trench within the substrate. The trench is filled with an insulative material that is implanted with boron ions and thereafter annealed.

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