Semiconductor integrated circuit device for preventing...

Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Wire contact – lead – or bond

Reexamination Certificate

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C257S758000, C257S780000

Reexamination Certificate

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07081681

ABSTRACT:
By having substantially narrow pitches between wires in a first wiring layer located in an interlayer insulating layer of a semiconductor integrated circuit device, a total amount of the first wiring layer in the interlayer insulating film may be increased, thereby reducing a total amount of the interlayer insulating film having low hardness, which causes warping. As a result, stresses that are typically applied on a protective film of the semiconductor integrated circuit device due to the warping may be prevented. This may prevent the occurrence of a crack, etc. in the protective film. Therefore, it may be possible to prevent failures such as electrical disconnection of a second wiring layer above the protective film due to the crack in the protective film.

REFERENCES:
patent: 5027188 (1991-06-01), Owada et al.
patent: 5736791 (1998-04-01), Fujiki et al.
patent: 6080652 (2000-06-01), Yamaha et al.
patent: 6261883 (2001-07-01), Koubuchi et al.
patent: 6441467 (2002-08-01), Toyosawa et al.
patent: 08-213422 (1996-08-01), None
patent: 08-264647 (1996-10-01), None
Taiwense Office Action w/ English translation.
Korean Office Action w/ English translation.
Chinese Office Action w/ English translation.

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