Structure for strained channel field effect transistor pair...

Details Structure for strained channel field effect transistor pair... Structure for strained channel field effect transistor pair...

2006-09-05

2006-09-05

Huynh, Andy (Department: 2818)

Active solid-state devices (e.g., transistors, solid-state diode

Combined with electrical contact or lead

Of specified material other than unalloyed aluminum

C257S621000, C438S618000

Reexamination Certificate

active

07102233

ABSTRACT:
A structure is provided in which a semiconductor device region has a first portion and a second portion, and a device disposed in the first and second portions. A current conducting member extends horizontally over the first portion but not over the second portion. A dielectric region, having a substantially planar upper surface, is disposed over the member, the dielectric region overlying substantially all of an area of the semiconductor device region that is occupied by the device. A dielectric barrier layer overlies the upper surface of the dielectric region, over substantially all of the area that is occupied by the device. The barrier layer is adapted to substantially prevent diffusion of one or more materials from above the barrier layer into the dielectric region. A contact via extends through the barrier layer and the dielectric region, the contact via in conductive communication with at least one of the member and the second portion of the semiconductor device region.

REFERENCES:
patent: 6211035 (2001-04-01), Moise et al.
patent: 6599813 (2003-07-01), Beyer et al.
patent: 6943398 (2005-09-01), Ito et al.
patent: 2003/0222299 (2003-12-01), Miura

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