Method for erasing/programming a non-volatile electrically...

Details Method for erasing/programming a non-volatile electrically... Method for erasing/programming a non-volatile electrically...

2006-03-14

2006-03-14

Le, Vu A. (Department: 2824)

Static information storage and retrieval

Floating gate

Particular biasing

C365S185230

Reexamination Certificate

active

07012837

ABSTRACT:
A method is provided for erasing or programming at least one memory cell of a non-volatile memory. According to the method, a state fixation pulse is applied to a floating gate transistor of the memory cell. The state fixation pulse also includes, successively, a portion at a reference voltage, and a state fixation portion at a voltage with sufficient amplitude for the transfer of electrons between the drain and the gate of the floating gate transistor. Additionally, an external adjustment signal is applied to the memory to adjust the state fixation portion to a predetermined duration, and the state fixation portion is adjusted to the predetermined duration in real time as a function of the state of the adjustment signal. Also provided is a non-volatile memory.

REFERENCES:
patent: 5978275 (1999-11-01), Song et al.
patent: 6560764 (2003-05-01), Jaengbamrung et al.
patent: 0 762 428 (1997-03-01), None
patent: 1 217 628 (2002-06-01), None
patent: 2 798 769 (2001-03-01), None

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