Method and device for converting a quantized digital value

Coded data generation or conversion – Digital code to digital code converters – Adaptive coding

Reexamination Certificate

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C341S143000

Reexamination Certificate

active

07046173

ABSTRACT:
The invention concerns a method and a device for converting an input digital value quantized in accordance with a first quantization factor and encoded on at most n1 bits, into an output digital value quantized in accordance with a second quantization factor and encoded on at most n2 bits. The method comprises the steps of: multiplying the input digital value by an integer B, encoded on at most β bits, so as to generate an intermediate digital value; and dividing, in fixed point, the first intermediate digital value by the number 2α, where α is an integer not greater than n1+β, generating the output digital value. The number B/2αis substantially equal to the ratio of the second quantization factor over the first quantization factor. Additionally, the divider means comprise a Sigma-Delta modulator.

REFERENCES:
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patent: 2001/0050959 (2001-12-01), Nishio et al.
patent: WO 01/24357 (2001-04-01), None
International Search Report of PCT/FR02/04433 dated Apr. 15, 2003.
Perrott et al., “A 27-MW CMOS Fractional-N Synthesizer Using Digital Compensation for 2.5-MB/S GFSK Modulation”IEEE Journal of Solid-state Circuits, IEEE Inc. New York, US, vol. 32, No. 12, Dec. 1, 1997, pp. 2048-2060.

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