Methods for preserving strained semiconductor substrate...

Details Methods for preserving strained semiconductor substrate... Methods for preserving strained semiconductor substrate...

2006-07-04

2006-07-04

Brewster, William M. (Department: 2823)

Semiconductor device manufacturing: process

Making device or circuit emissive of nonelectrical signal

Packaging or treatment of packaged semiconductor

C438S030000, C438S106000, C438S113000, C438S455000, C438S458000, C438S460000

Reexamination Certificate

active

07071014

ABSTRACT:
Oxidation methods, which avoid consuming undesirably large amounts of surface material in Si/SiGe heterostructure-based wafers, replace various intermediate CMOS thermal oxidation steps. First, by using oxide deposition methods, arbitrarily thick oxides may be formed with little or no consumption of surface silicon. These oxides, such as screening oxide and pad oxide, are formed by deposition onto, rather than reaction with and consumption of the surface layer. Alternatively, oxide deposition is preceded by a thermal oxidation step of short duration, e.g., rapid thermal oxidation. Here, the short thermal oxidation consumes little surface Si, and the Si/oxide interface is of high quality. The oxide may then be thickened to a desired final thickness by deposition. Furthermore, the thin thermal oxide may act as a barrier layer to prevent contamination associated with subsequent oxide deposition.

REFERENCES:
patent: 4764248 (1988-08-01), Bhattacherjee et al.
patent: 5442205 (1995-08-01), Brasen et al.
patent: 5565690 (1996-10-01), Theodore et al.
patent: 5726087 (1998-03-01), Tseng et al.
patent: 5780922 (1998-07-01), Mishra et al.
patent: 6107653 (2000-08-01), Fitzgerald
patent: 6284615 (2001-09-01), Pinto et al.
patent: 6680496 (2004-01-01), Hammond et al.
patent: 6831292 (2004-12-01), Currie et al.
patent: 6838728 (2005-01-01), Lochtefeld et al.
patent: 2001/0026997 (2001-10-01), Henley et al.
patent: 2002/0068393 (2002-06-01), Fitzgerald et al.
patent: 2002/0171077 (2002-11-01), Chu et al.
patent: 2003/0230233 (2003-12-01), Fitzgerald et al.
patent: 2004/0031979 (2004-02-01), Lochtefeld et al.
patent: 2004/0040493 (2004-03-01), Vineis et al.
patent: 01/022482 (2001-03-01), None
patent: 03/001607 (2003-01-01), None
Stanley Wolf Ph.D. and Richard N. Tauber Ph.D. in Silicon Processing for the VLSI Era, vol. 1: Process Technology, Lattice Press, 1986, 99. 182-3, 307-8.
Currie et al., “Carrier Mobilities and Process Stability of Strained Si n- and p-MOSFETs on SiGe virtual substrates,”J. Vac. Sci. Technol. B, 19(6):2268-2279 (2001).
Kummer et al., “Low Energy Plasma Enhanced Chemical Vapor Deposition,”Mat. Sci.&Eng. B89, 288-295 (2002).
Leitz et al., “Hole mobility enhancements and alloy scattering-limited mobility in tensile strained Si/SiGe surface channel metal-oxide-semiconductor field-effect transistors,”Journal of Applied Physics, 92(7):3745-3751 (2002).
Lucovsky et al., “Low-temperature plasma-assisted oxidation of Si: a new approach for creation of device-quality Si-SiO2interfaces with deposited dielectrics for applications in Si MOSFET technologies,”Journal of Non-Crystalline Solids, 179 354-366 (1994).
Pal et al., “Gd2O3, Ga2O3(GD2O3), Y2O3, and Ga2O3, as high-k gate dielectrics on SiGe: A comparative study,”Journal of Applied Physics, 90(8):4103-4107 (2001).
Sugii et al., “Role of Si1-xGexbuffer layer on mobility enhancement in a strained-Si n-channel metal-oxide-semiconductor field-effect transistor,”Applied Physics Letters, 75(19):2948-2950 (1999).
Invitation to Pay Additional Fees for International Application No. PCT/US 03/34576 mailed on Dec. 17, 2004, 7 pages.

Affiliated with

Also associated with

Rating

Methods for preserving strained semiconductor substrate... does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Methods for preserving strained semiconductor substrate..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Methods for preserving strained semiconductor substrate... will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-3544391